During the RAPIDO workshop some relevant personalities of our community will held a keynote.
Abstract Although there is a rich history of cross-layer design for embedded computing systems to achieve desired QoS, we are facing ever more challenges from the intertwined goals of energy- efficiency, thermal design constraints, as well as resilience to errors emanating from the application, environment and hardware platforms. We posit that next-generation computing platforms must necessarily deploy intelligent cross-layer design achieved through self-awareness principles inspired by biology and nature. Such an approach will move us from current strategies (using limited cross-layer coordination) to a holistic cross-layer strategy that enables intelligent cross-layer management policies which can adaptively tune itself based on the current state of the system. The talk will present design exemplars that embrace this intelligent cross-layer approach, and highlight the role of self-awareness in achieving dynamic adaptivity.
Short CV Fadi Kurdahi received his PhD from the University of Southern California in 1987. Since then, he has been a faculty at the Department of Electrical \& Computer Engineering at UCI, where he conducts research in the areas of Computer Aided Design and design methodology of large scale systems. He serves as the Associate Dean for Graduate and Professional Studies of the Henry Samueli School of Engineering, and the Director of the Center for Embedded \& Cyber-physical Systems (CECS), comprised of world-class researchers in the general area of Embedded and Cyber-physical Systems. He served on numerous editorial boards, and was program chair or general chair on program committees of several workshops, symposia and conferences in the area of CAD, VLSI, and system design. He received the best paper awards for the IEEE Transactions on VLSI in 2002, ISQED in 2006 and ASP-DAC in 2016, and other distinguished paper awards at DAC, EuroDAC, ASP- DAC and ISQED. He also received the Distinguished Alumnus award from his Alma Mater, the American University of Beirut in 2008. He is a Fellow of the IEEE and the AAAS.
Abstract Since the first use of the word "Digital-Twin" by Michael Grieves in a 2003, several research publications have addressed the technical obstacles underlying the implementation of this concept. In parallel with these academic research works, several industrial research projects have been undertaken for an evaluation in real or representative conditions of this approach. Certain sectors, such as nuclear and aeronautics, exploit digital twins throughout the life cycle of their products and in particular for the training of operating or maintenance personnel. Today the proof is made of the usefulness of the digital twin but unfortunately we note that the deployment of this approach is limited to a few areas of application and only the category of large industrial groups have access to it but in limited usages. The objective of the presentation is, firstly, to review the theoretical foundations and known uses of the digital twin in the field of CPS. Then to expose, in a second part, the blocking points to a massive deployment of this approach in the industrial world. The presentation ends with the proposal of the economic model MSaaS (Modeling and Simulation as a Service) which should answer a certain number of the identified problems and allow the emergence of an agile ecosystem to meet the needs of the industry in this field.
Short CV Reda NOUACER is a research engineer at CEA LIST where he work on design space exploration and virtual platforms. Before he worked at Prosilog SA and then at Texas Instruments. His research interests include design space exploration, hardware simulation, and dependability using virtual platforms. He earned a HW/SW Engineer degree in 1993 and the Magister degree in 1997 in Computer Engineering from the Badji-Mokhtar University (Annaba-Algeria). His thesis entitled ‘CAMELEON: A Parallel Architecture Emulator’ summarizes his work on building a low-cost emulator of parallel architectures for parallel programs validation. Reda NOUACER is and has been involved in many interdisciplinary national and international basic research projects as well as industrial research projects.
Abstract Access to massive amounts of data and high-end computers has heralded revolutionary advances in Machine Learning (ML) impacting domains ranging from autonomous driving and robotics, to healthcare, the natural sciences, the arts and beyond. As we deploy modern ML systems in safety- and health-care applications, however, it is important to ensure their security against adversarial attacks. Researchers have shown that many modern ML algorithms, especially the ones based on the deep neural networks (DNNs) are fragile and can be embarrassingly easy to fool. This is easier said than done. Recent research has shown that DNNs are susceptible to a range of attacks including adversarial input perturbations, backdoors, Trojans, and fault attacks. This can create catastrophic effects for various safety-critical applications like automotive, healthcare, etc. For instance, self-driving cars and vehicular networks, which heavily rely on ML-based functions, exhibit a wide attack surface that can be exploited by well-known and yet-unknown-but-possible attacks on ML models. DNNs contain hundreds of millions of parameters and are hard to interpret/debug let alone verify, significantly increasing the chance they may misbehave. Further, any ML system is only as robust as the data on which we train it on. If the data distributions change in the field, this can impair performance (for example, an autonomous vehicle trained in day time conditions may not function at nighttime). The goal of this talk is to shed light on various security threats for the ML algorithms, especially the deep neural networks (DNNs). Various security attacks and defenses for DNNs will be presented in detail. Afterwards, open research problem and perspectives will be briefly discussed.
Short CV Muhammad Shafique received the Ph.D. degree in computer science from the Karlsruhe Institute of Technology, Germany, in 2011. He is currently a Full Professor with the Department of Informatics, Institute of Computer Engineering, TU Wien, Austria, where he is directing the group on Computer Architecture and Robust, Energy-Efficient Technologies. He holds one U.S. patent and over 200 papers in premier journals and conferences. His research interests include computer architecture, energy-efficient systems, robust computing, hardware security, brain-inspired computing, emerging technologies, and embedded systems. His research has a special focus on cross-layer analysis, the modeling, design, and optimization of computing and memory systems, and their integration in the Internet of Things and smart cyber-physical systems. He is a Senior Member of the IEEE and a member of the ACM, SIGARCH, SIGDA, SIGBED, and HiPEAC. He received the 2015 ACM/SIGDA Outstanding New Faculty Award, six gold medals, and several best paper awards and nominations at prestigious conferences. He served on the program committees of several conferences and gave several invited talks, tutorials, and keynotes.
Abstract Model Based Design (MBD) has proven to be a powerful technology to address the development of increasingly complex embedded systems. Beyond complexity itself, challenges come from the need to target various execution platforms with different OSs and HW resources, even bare-metal, the increasing parallelism provided by them and its increasing heterogeneity. An additional difficulty comes from the tendency towards system applications in which the embedded system is only a piece of a much complex, distributed system. In any case, appropriate solutions improving performance,power consumption, cost, etc. have to be analyzed and selected. Addressing these challenges require flexible design technologies able to support from a single-source model its architectural mapping to different computing resources, of different kind and in different platforms. Thanks the potential of MBD methods and tools they should ensure flexibility and reusability. In this presentation, S3D, a UML/MARTE system modeling methodology is proposed able to address the challenges mentioned above by improving flexibility and scalability. This approach is illustrated and demonstrated on a flight management system. The model is flexible enough to be adapted to different architectural solutions with a minimal effort by changing its underlying model of Computation and Communication (MoCC). Being completely Platform Independent, from the same model it is possible to explore and generate various solutions on different execution platforms.
Short CV Eugenio Villar got his Ph.D. in Electronics from the University of Cantabria in 1984. Since 1992 is Full Professor at the Electronics Technology, Automatics and Systems Engineering Department of the University of Cantabria where he is currently the responsible for the area of HW/SW Embedded Systems Design at the Microelectronics Engineering Group. His research activity has been always related with system specification and modeling. His current research interests cover system specification and design, MPSoC modeling and performance estimation using SystemC and UML/Marte. He is author of more than 130 papers in international conferences, journals and books in the area of specification and design of electronic systems. Prof. Villar served in several technical committees of international conferences like the VHDL Forum, Euro-VHDL, EuroDAC, DATE, VLSI-SoC and FDL. He has participated in several international projects in electronic system design under the FP5, FP6 and FP7, Itea, Medea-Catrene and Artemis programs. He is the representative of the University of Cantabria in the ArtemisIA JU.