- Maxime Pelcat (INSA Rennes) - Strategies and Tools for Sustainable Electronics
- Behzad Salami (BSC) - Design Exploration and Simulation for Implementations of Machine Learning Applications
Schedule:
10:00 - 10:10 Welcome Session
10:10 - 11:00 Keynote session
Strategies and Tools for Sustainable Electronics - Dr. Maxime Pelcat
11:00 - 11:30 Coffee break
11:30 - 12:10 Session 1
11:30 - 11:50 : A C Subset for Ergonomic Source-to-Source Analyses and Transformations, João N. Matos, Joao Bispo and Luís M. Sousa
11:50 - 12:10 : Using Source-to-Source to Target RISC-V Custom Extensions: UVE Case-Study, Miguel Henriques, João Bispo and Nuno Paulino
13:00 - 14:00 Buffet lunch
14:00 - 14:50 Keynote session
FPGAs for Pre-silicon Emulation of Large-Scale RISC-V based Processors: From Academia to Industry
Dr. Behzad Salami
14:50 - 15:30 Session 2
14:50 - 15:10 : Design Space Exploration of HPC Systems with Random Forest-based Bayesian Optimization, Vincent Fu, Lilia Zaourar, Alix Munier-Kordon and Marc Duranton
15:10 - 15:30 : An FPGA-Based HW/SW Platform for Pre-Silicon Emulation of RISC-V Designs, Elias Perdomo, Alexander Kropotov, Francelly Cano Ladino, Syed Zafar, Teresa Cervero, Xavier Martorell Bofill and Behzad Salami
15:30 - 16:00 Coffee break
16:00 - 17:00 Session 3
16:00 - 16:20 : NQC2: A Non-Intrusive QEMU Code Coverage Plugin, Nils Bosbach, Alwalid Salama, Lukas Jünger, Mark Burton, Niko Zurstraßen, Rebecca Pelke and Rainer Leupers
16:20 - 16:40 : Integration of RISC-V Page Table Walk in gem5 SE Mode, Mirco Mannino, Yinting Huang, Biagio Peccerillo, Alessio Medaglini and Sandro Bartolini
16:40 - 17:00 : Modeling methodology for multi-die chip design based on gem5/SystemC co-simulation, Fabian Schätzle, Carlos Falquez, Nam Ho, Stefan Heinen, Antoni Portero, Estela Suarez, Johannes van den Boom and Stefan van Waasen
